Investors Business Daily: Breaking News::
acquired companies or assets into Synopsys products and operations. other acquisition-related expenses, amortization of additional intangible assets
http://www.investors.com/breakingnews.asp?journalid=49662207HOME |
Integrated circuit maker Synopsys Wednesday said it has signed agreement to acquire certain assets of Qualis out of Lake Oswego, Oregon.
Mountain View, Calif.-based Synopsys said it will take over Qualis' verification Intellectual Property assets and its affiliated companies. The platform performs verification methodology consulting and training. Synopsys said the master plan is to include Qualis' Domain Verification Component (DVC) technology into its DesignWare Verification IP.
As a result of the transaction, the Qualis companies will discontinue sale and support of all existing Qualis products and will change their company names.
Synopsys invests in Prover Technology::
Synopsys buys IP Assets from Mosaid. Synopsys acquires ArchPro. Synopsys/Synplicity: agreement about ASIC Verification. Synopsys has acquired Sigma-C
http://www.channel-e.biz/news-en/article/synopsys-invests-in-prover-technology.htmlHOME |
Synopsys, Inc. Q2 2006 Earnings Conference Call Transcript (SNPS ::
Galaxy for implementation, and a strong collection of verification IP. A Look at New Asset Allocation and Hedged Equity ETFs
http://seekingalpha.com/article/10820-synopsys-inc-q2-2006ence-call-transcript-snpsHOME |
In addition, a number of key Qualis personnel will join the Synopsys team, including Qualis CTO Janick Bergeron. Financial details of the purchase were not disclosed.
Endpoint Digital Controller IP simplifies transition to PCIe., Synopsys ::
proven digital, mixed-signal and verification IP for system-on-chip designs. Synopsys Completes Acquisition of MOSAID Semiconductor IP Assets. Jul 16, 2007
http://news.thomasnet.com/fullstory/542531HOME |
Synopsys - Wikicompany::
Synopsys Inc (SNPS) holdings reduced by Ark Asset Management Co Inc - Mffais.com Synopsys Announces Silicon-Proven DDR3, DDR2 IP Solutions for SoC
http://wikicompany.org/wiki/SynopsysHOME |
"As the complexity of on- and off-chip communications protocols continues to increase, verification IP has become an essential part of the testbench. By adding Qualis' verification technology and engineering talent, Synopsys is accelerating its ability to deliver advanced verification IP to its customers," Synopsys vice president of marketing Joachim Kunkel said in a statement.
Qualis' DVC were developed for Verisity's Specman Elite and Synopsys' OpenVera. The platform is eVC-compatible and Vera IP technology helps verify processor, wireless, and networking system-on-a-chip (SoCs), FPGAs (define), and complex systems.
Written in OpenVera, DesignWare Verification IP workes in Vera, Verilog, VHDL and C-based verification environments. The DesignWare Verification Library is comprised of verification IP for the major components of SoC design. It includes verification IP for complex, standards-based on- and off-chip communications protocols, including the AMBA 2.0 on-chip-bus, PCI, PCI-X 2.0, PCI Express, USB 1.1 and 2.0, Ethernet and IEEE 1394a. It also features more than 8000 memory models as well as simulation views of DesignWare Star IP microprocessor cores.
This is the second major purchase this year for Synopsys. Last month, the company finished its acquisition of lithography technology provider Numerical Technologies.
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